Red Chili
The Chip Project Brain
Red Chili keeps a coherent, current picture of your chip project and gives every engineer and coding agent exactly what their task needs. It is a brain, not memory.
Knowledge
Red Chili understands the project’s insides: modules, interfaces, flows and dependencies, where each thing lives and why it is the way it is. It knows chips, not just documents.
Coherence
One consistent view across specifications, RTL, verification, implementation and decisions. Contradictions are surfaced for an engineer to settle, not stored side by side.
Maintenance
Knowledge is kept current as the project changes. Stale facts are detected and corrected, so a briefing reflects the design as it is today, not as a wiki page described it last year.
Accessibility
The right knowledge is reachable by any engineer or agent, through the tools they already use. Your coding agent asks for its briefing the same way it calls any other tool.
Focus
Each task gets only what it needs: the relevant facts, edit boundaries and checks. Agents spend their effort and their budget on the work instead of searching.
How Red Chili works
A continuously maintained, evidence-backed model of your chip that learns from every task your engineers and agents complete.
- 1
Collect
Ingest RTL, specs, tickets, plans, coverage, regressions and debug notes.
- 2
Structure
Organize it into semiconductor-aware knowledge: modules, interfaces, tests, assertions, failures.
- 3
Validate
Back every fact with evidence, scope and freshness.
- 4
Distill
Compile only what the current task needs into a focused briefing.
- 5
Deliver
Hand the briefing to the engineer or straight to their coding agent.
- 6
Learn
Confirmed facts and accepted changes flow back in.
Every finished task makes the next briefing sharper.
One task, one briefing
Instead of stuffing your whole project into your coding agent’s context, Red Chili hands it exactly what the task needs, so the agent spends its credits on the work, not on searching. This is what the engineer or agent receives.
Verified facts
- HRESP is driven only in the data phase; two-cycle ERROR response is required by AMBA 5 AHBAMBA 5 AHB spec
- ahb_subordinate uses the valid/accept handshake from the house conventionsdoc/valid_accept_handshake.md
- Reset is asynchronous, active-low; no always_ff outside storage primitivesDEV.md
Assumptions to check
- Error is signalled for unmapped addresses only
- No change to the manager side
Edit boundaries
- Edit: ahb_subordinate.sv, its manifest entry, its checker
- Do not touch: ahb_pkg encodings
Acceptance criteria
- Lint and synthesis clean
- Checker covers the two-cycle ERROR sequence
- Regression matches the reference model
Illustrative example.
What Red Chili does
Knowledge ingestion
Reads the places project knowledge already lives.
- RTL, SystemVerilog and UVM source
- Specs, requirements and tickets
- Verification plans and coverage
- Regression, lint, synthesis and layout results
- Waivers and prior debug notes
Semiconductor-aware knowledge
Understands chips, not just documents.
- Modules, hierarchy and interfaces
- Clocks, resets, packages and macros
- UVM components, tests and sequences
- Assertions, coverage and known failures
- Generate, build and check flows
Task-context distillation
Turns project knowledge into a briefing for one task.
- Classifies the task
- Picks the relevant artifacts and drops the rest
- States verified facts and assumptions to check
- Defines edit boundaries
- Sets acceptance criteria
Consistency checks
Keeps the project’s own records honest.
- Flags stale or contradictory facts
- Checks project data files after every edit
- Tells the agent which checks a change needs
Feedback loop
Gets sharper with every task.
- Engineers confirm or correct facts
- Accepted changes update the project knowledge
- Debug conclusions become reusable
Where Red Chili helps
From onboarding to debug to review, for RTL, DV and methodology teams.
Onboard faster
New engineers get a briefing on the block, its interfaces, its tests and its history, instead of hunting through wikis and asking around.
Make AI agents project-aware
Agents get the verified facts, edit boundaries and acceptance criteria for the task, so their output fits your project and its conventions.
Triage failures with history
Regression failures are matched against known failures, waivers and past debug conclusions.
Trace intent end to end
Follow a requirement through spec, RTL, UVM, assertions, coverage and regressions.
One answer across teams
RTL, DV, architecture, validation and management read from the same evidence-backed picture of the project.
Works with the agents you choose
Your models and coding agents do the reasoning. Your EDA tools simulate, verify and implement. Red Chili is the chip-specific brain between them.
MCP server
Any MCP-capable coding agent, which covers the major ones, fetches the briefing for its task as a tool call before it writes a line.
CLI
Generate a briefing from the terminal, or as a step in scripts and CI before an agent run.
Other integrations
Need another integration? We connect Red Chili to the tools your team works in.
No model or agent is bundled: Red Chili works with the one your company already approved.
Built for agent-driven chip design
As chip design becomes agent-driven, Red Chili helps the engineering infrastructure evolve with it. We’re opening pilots for RTL and DV teams already using coding agents.
Request a Pilot